In a typical read-out integrated circuit (ROIC), a rectangular focal plane array (FPA) contains pixels arranged in rows and columns. Periodically, during each frame period, a video stream comprising the sequential contents of the pixels is transferred to an output. This video stream may include a sequence of coulombic charges, voltages, or digital values (if a mechanism by which to convert the pixel contents to digital values resides on the ROIC). Rows of the FPA may be read one at a time to column circuits, there being one column circuit per column of the array. Subsequently, each individual pixel of the column circuit is transferred sequentially to the output. In some examples, the original address space is projected across all rows and columns of the array and decoded using AND gates. Each unique address of a pixel in the array is directly decoded from all bits of the address space.